Forum Discussion

vrbavojtech's avatar
vrbavojtech
Icon for New Contributor rankNew Contributor
3 years ago

Cyclone V - DMA Controller Intel FPGA IP Interrupts

Hello, I am currently trying to find out how to trigger a transfer of DMA Controller Intel FPGA IP (connected between f2h_sdram0 and on-chip 2-port RAM in QSYS) using an interrupt from the FPGA sid...
vrbavojtech's avatar
vrbavojtech
Icon for New Contributor rankNew Contributor
3 years ago

Thanks for the information.

In the previous post I stated that I clear the PER2MODRST register bits (using mw.b command), but the DMA-330 is stuck in the Wait For Peripheral state (the waiting state) no matter if I set or reset the DMA request signal in the fabric.

Maybe the problem could be accessing DMA from the linux userspace?
Providing a minimal functioning example (eg. Quartus project) or at least the HPS configuration with the code would be really helpful

Thank you.