Forum Discussion
vrbavojtech
New Contributor
3 years agoCyclone V - DMA Controller Intel FPGA IP Interrupts
Hello,
I am currently trying to find out how to trigger a transfer of DMA Controller Intel FPGA IP (connected between f2h_sdram0 and on-chip 2-port RAM in QSYS) using an interrupt from the FPGA sid...
EBERLAZARE_I_Intel
Regular Contributor
3 years agoHi,
We do not really have a direct example for this, but to best guide you, it is the peripheral requests mentioned for DMA controller for Cyclone V SoC:
The FPGA peripherals, these channels are mapped in the registers of Cyclone V SoC here:
https://www.intel.com/content/www/us/en/programmable/hps/cyclone-v/hps.html#sfo1410067855000.html
For future usage and info on the DMA controller, you need to refer to the ARM doc , on the "using events and interrupts" section:
From there you can either use an event to restart the DMA channels or Interrupting a microprocessor. I hope these documents may help you.