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Altera_Forum's avatar
Altera_Forum
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10 years ago

Cyclone IV Transceivers

Hi all. I would like to ask for help, because I`m not really versed in this issue.

The essence of the problem in incorrect actuation at block synchronization word search, and as result, thetransmission output wrong data. The error occurs infrequently, aboutonce every 4-5 launches, the laws in these appearances is not defined.

Board EP4CGX30BF14C8, Functional mode - Basic.

language - Verilog HDL, input clock frequency - 120MHz, channel - fiber.

Script and timing diagrams with examples of correct operations and error in attachments.

8 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    If issue can be observed in Modelsim simulation, it is likely due to transceiver configuration or test bench related issue. Are you performing loopback from TX to RX in simulation and observe error at RX?

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    You can try to start simple by sending only fixed data pattern. This will ease the debugging.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    That's what I did. The problem is that a fixed set of data does not display false positives. And with the right - all in their places.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    The problem is unlikely transceiver configuration as in the test stand.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    If there is no issue when sending fixed data, then probably you should further check your data generator in your design for anomaly.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    When sending a fixed data, there is no problem only if the right triggers. Since in this case we see, and sent a set of triggering and synchronization of a given word. But also in this case are false tripping, the feast which the output is not seen nothing but trash