Cyclone IV Transceivers

Question

Hi all. I would like to ask for help, because I`m not really versed in this issue.

The essence of the problem in incorrect actuation at block synchronization word search, and as result, thetransmission output wrong data. The error occurs infrequently, aboutonce every 4-5 launches, the laws in these appearances is not defined.

Board EP4CGX30BF14C8, Functional mode - Basic.

language - Verilog HDL, input clock frequency - 120MHz, channel - fiber.

Script and timing diagrams with examples of correct operations and error in attachments.

altera_forum · Answer

Do you observe the same with Modelsim simulation?

altera_forum · Answer

Yes, the Modelsim simulation result is the same

altera_forum · Answer

If issue can be observed in Modelsim simulation, it is likely due to transceiver configuration or test bench related issue. Are you performing loopback from TX to RX in simulation and observe error at RX?

altera_forum · Answer

You can try to start simple by sending only fixed data pattern. This will ease the debugging.

altera_forum · Answer

That's what I did. The problem is that a fixed set of data does not display false positives. And with the right - all in their places.

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Cyclone IV Transceivers

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