Forum Discussion
Altera_Forum
Honored Contributor
7 years agoI was able to get the data through 88e1111 to fpga. I had to send the same data pattersn BC 50 BC 50 ......to the PHY to make sure fpga is not idle state. Once I did this, I was able to see the data packet from the computer in signaltap. Only thing was when I was sending BC 50 BC 50....pattern I had to make sure I made the tx_control high when I send out BC so that the transceiver knows to encode it as a control word as opposed to a data word