Cyclone IV GX: Pin connection guideline and .pin file

Hello,

I am a bit confused about the differences between the pin connection guideline and the .pin file that quartus ii produces after compilation.

In he PCG dual purpose io pins such as VREF, DEV_CLRn and DEV_OE should be connected to GND when not used. In the .pin file those pins are marked as tristated input with weak pullup - just like the global quartus ii setting.

My confusion is based on the same situation for the clkin pins. Those should be directly connected to GND (PCG) and this is also reported in the .pin file. In this way, PCG and .pin file match.

Does this mean that I can leave the dual purpose pins (VREF, ...) unconnected and use the internal pullup to avoid floating IO buffers?

Should I connect those pins to GND and define them as "outpu driving ground" by my own or is there no need for this? I am asking because it will not be able to ground DEV_CLRn and DEV_OE because of pinplacement restrictions due LVDS outputs.

Thanks for your help!