Honored Contributor
Honored ContributorHi,
Please see the response from mysupport link in Altera website.... "Sorry for not explaining in details. By providing 3.3V to pin-4 of JTAG port, you will not be damaging the FPGA device FPGA pin since the bank 1 is powered up using 3.3V power supply. In other words, bank 1 will be using 3.3V IO standard during configuration. The main reason that the configuration chapter is using 2.5V is due to if you are using USB-Blaster rev A or rev B cable then you will need to have pin-4 connect to 2.5V. If pin-4 is connected to 3.3V for rev A or rev B USB-Blaster then you will damage the cable. If you are using USB-Blaster rev C then you will not face any issue in using 2.5V or 3.3V to pin-4 JTAG port." I hope i can connect 3.3V JTAG signals from USB blaster to cyclone-IV E FPGA on the board. Please comment on the above response from Altera. Regards, Thulasi
