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Altera_Forum's avatar
Altera_Forum
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17 years ago

Cyclone III Remote Update with EPCS

I am trying to load a second image from my EPCS device using only the firmware(VHDL code), without the Nios II IDE and SOPC Builder. I have generated the remote_update.vhdl using the MegaWizard Plug in Manager and instantiated in my top level vhdl code. However, once the FPGA reconfigures, it doesn't load the second image from the specified address.

Below is state machine from my cycloneIII. any help would be appricated.

Thanks

Component instantiation

remote_update: memory_remote_update_rmtupdt_e0l

PORT MAP

(

busy => busy_s, --: OUT STD_LOGIC;

clock => sysclk_s, --: IN STD_LOGI

data_in => "1100000000000000000000", -- offset addres in my EPCS

data_out => OPEN, --: OUT STD_LOGIC_V

param => "100", --: --boot_Address I

read_param => '0', --: IN STD_LOGIC := '0'

read_source => "00", --: IN STD_LOGIC_VE

reconfig => reconfigure_s, --: IN STD_

reset => nRESET, --: IN STD_LOGIC;

reset_timer => OPEN, --: IN STD_LOGIC :=

write_param => write_param_s --: IN STD_

);

PROCESS(nRESET, sysclk_s)

BEGIN

IF nRESET = '0' THEN

state <= init_1;

write_param_s <= '0';

reconfigure_s <= '0';

ELSIF RISING_EDGE(sysclk_s) THEN

state <= init_1;

write_param_s <= '0';

reconfigure_s <= '0';

CASE state IS

WHEN init_1 =>

IF sdram_done_s = '1' AND sram_done_s = '1' THEN

write_param_s <= '1';

END IF;

state <= init_2;

WHEN init_2 =>

IF busy_s = '0' THEN

state <= reconfig_s;

ELSE

-- Do Nothing

END IF;

WHEN reconfig_s =>

reconfigure_s <= '1';

END CASE;

END IF;

END PROCESS;

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Maybe this helps.

    Are you aware that the boot address to be writen are the upper 22 bits of the 24 bit EPCS address? If not you must shift your data_in with 2 bits to the right.

    Secondly I noticed that you left the reset_timer input 'OPEN' you should tie that to '0' as well.