Cyclone III PLL VCO Granularity

Ok, I found out by myself. First, my example was veeery poor because I didn't recognise that I choose one which has an operating frequency outside the specs. What I meant did happen inside too. It's actually very simple and I just didnt't think things trough. If I have an input frequency of 12 MHz and we assume n to be 1, the one frequency at the PFD (fref) is also 12 MHz. So he of course chooses m the way that fvco/m is fref so the PLL is locked (also assuming post-scale counter to be 1). I first calculated the other way around. Given an output frequency of i.e. 23.158 MHz and an output divisor of 30 the fvco should be 694.74MHz. He now searches to nearest integer which has no remainder after dividing with 12 and thats m and thats also what I first did not recognise. Here it is m = 58 and therefore fvco = 696MHz. With a known fvco I can now calculate the real output frequency fout = fvco/30 = 23.2MHz.

Well, what I actually want to do is to reengineer the algorithm used by the mega-wizard to determine the different values. Kind of a brute-force approach already works. But I don't know if it's fast enough for a microcontroller implementation... If anybody has another idea I would be very glad to hear it.

And I think m, n and k are all 9 bits as they can have values between 1 and 512 if I'm right.