Altera_Forum
Honored Contributor
15 years agoCyclone III LS questions
Hello all. We're going to be using a Cyclone III LS in our upcoming design, and I had a couple questions about it.
What size EPCS do I need? Looking at what info I can find, it seems that the EPCS64 is the smallest that will fit an LS program file without compression. How does the Design Separation work? I've read that in Quartus software you use the LogicLock functionality to define modules that are to be kept separate from other sections. I also see that there are IO pins on the FPGA that are to be tied to GND to isolate specific IO Banks from each other. Do these two methods have to be used together or can they be used separately and independently to achieve design separation? Can the AS Device be programmed through JTAG (using the FPGA as the interface between the two) like the Cyclone II? Thank you very much!