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Altera_Forum's avatar
Altera_Forum
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15 years ago

Cyclone III LS questions

Hello all. We're going to be using a Cyclone III LS in our upcoming design, and I had a couple questions about it.

What size EPCS do I need? Looking at what info I can find, it seems that the EPCS64 is the smallest that will fit an LS program file without compression.

How does the Design Separation work? I've read that in Quartus software you use the LogicLock functionality to define modules that are to be kept separate from other sections. I also see that there are IO pins on the FPGA that are to be tied to GND to isolate specific IO Banks from each other. Do these two methods have to be used together or can they be used separately and independently to achieve design separation?

Can the AS Device be programmed through JTAG (using the FPGA as the interface between the two) like the Cyclone II?

Thank you very much!

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    you might give your local distributor a call, i think you'll need a special license to use the features anyhow

    what i really need is a proper pancake avatar :)
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Excellent, thanks for confirming those things. I looked again at the Design Separation pdf, and I think I have a better idea now. If your secured and separated areas connect directly to IO pins, then the banks that those pins reside in should be isolated from the adjacent banks using those specified pins on the FPGA.

    So LogicLock is necessary for design separation, but the bank isolation pins are needed only if IO pins are included in the separated modules.

    Thanks for your help!

    However, I have to hate you just a little bit. I started a diet recently, and now I REALLY want pancakes.