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Altera_Forum
Honored Contributor
16 years agoCyclone III FPGA set to I/O mode
Hello all, well i am a bit new to Cyclone III FPGA, so, the problem i am having is a bit strange. i have made VHDL IP-core, which worked fine previously on my MAX-II CPLD, but now i wanted to r...
Altera_Forum
Honored Contributor
16 years agoSetting pins connected to other chips to tristate isn't a good idea, because the pins float to an unknown value, vcc or gnd is even worse, because you have to assure, that no pin is driving out, possibly damaging a FPGA pin by a high short circuit current. You should select either tristate with weak pull-up or hold-circuit for unconfigured pins.
As said, there's no simple explanation for the observed behaviour. It may be the case, that a floating tri-state pin enabled the connected device in an unexpected way and caused switching noise affecting other parts of the circuit. Also a high current consumption can overload the power supply in this situation.