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Honored Contributor
Honored ContributorCyclone III AS Configuration
Hello, I am having some problems getting AS configuration working with my Cyclone III FPGA. I am using an EPCS16 for the configuration chip and the C3 is a EP3C25F324C8N on a custom board. Th...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Correct me if I'm wrong, but DCLK looks ok, it's just the rise time on nCSO and the ASDO lines that look bad, right? --- Quote End --- DCLK may be regarded OK, but it doesn't look like a FPGA output signal, the other signal are beyond acceptable specifications. A hardware engineer should be able to see the reason with the board at his fingertips, but not from a distance.
