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Altera_Forum
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17 years ago

Cyclone III AS Configuration

Hello, I am having some problems getting AS configuration working with my Cyclone III FPGA. I am using an EPCS16 for the configuration chip and the C3 is a EP3C25F324C8N on a custom board. Th...
Altera_Forum's avatar
Altera_Forum
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17 years ago

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Correct me if I'm wrong, but DCLK looks ok, it's just the rise time on nCSO and the ASDO lines that look bad, right?

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DCLK may be regarded OK, but it doesn't look like a FPGA output signal, the other signal are beyond acceptable specifications. A hardware engineer should be able to see the reason with the board at his fingertips, but not from a distance.