Cyclone EP1C20 slew rate

The rise/fall times are not in the Cyclone datasheet. You could try measuring them on a (fast) oscilloscope, though.

You can reduce the slew rate by setting the "Slow Slew Rate' in the Assigment Editor. It really helps in reducing EMI emission.

Page 61 of alter cyclone family hand book says -

"Using minimum settings provides signal slew rate

control to reduce system noise and signal overshoot"

Reducing overshoot is exactly what I am trying to do. Are rise/fall time that difficult to put in a data sheet.

--- Quote Start ---

Are rise/fall time that difficult to put in a data sheet.

--- Quote End ---

Most likely it isn't. Put it in as a specification means it has to be tested. Apparently Altera ried to avoid this.

Actual rise- and fall times depend a lot on load capacitances. Newer chips, e.g. Cyclone III have a big list of specifications, that allow to estimate the IO speed depending on current strength and load capacitances. Similar data aren't given for Cyclone.

But detailed empirical rise- and fall times for most devices, also Cyclone, are given in the ibis files available at Altera.com. Nevertheless, most designers prefer to adjust the IO parameters based on measurements, I think.

How do you get it from IBIS? from the ramp info -

[Ramp]

dV/dt_r 1.071e+000/1.704e-009 6.947e-001/2.142e-009 1.195e+000/1.026e-009

dV/dt_f 1.003e+000/7.980e-010 6.627e-001/1.026e-009 1.269e+000/6.460e-010

Refer to the IBIS specification http://www.eigroup.org/ibis/specs.htm

The [Ramp] values are calculated from the above rising and falling waveform tables, which are almost self-explanatory, I think. Please notice the voltage terminated 50 ohm load ("R_fixture","V_fixture") which possibly reduces the output swing below the specifications of the respective I/O standard. But the effect of the "Slow Slew Rate I/O" setting can be clearly seen.