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Altera_Forum
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13 years ago

Cyclone 3 spi interface to mcp2515 spi can chip

HI,

I am trying to write a verilog interface.

The interface is between the spi Core and a Mcp2515 Can Controller

with a SPI inteface.(just the general interface ).

I am not sure about the best way of writing this interface,

after obtaining the data sheet for both devices.

I think I will have to also use a Sopc Component aswell as

the verilog code.

Are there any examples of this.

Can you start me off with this.

Thanks

Dave.

9 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Just use the SPI component in SOPC/QSys. Very well documented and easy to use.

  • Altera_Forum's avatar
    Altera_Forum
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    Thanks Socrates.

    I see the Spi component in Sopc.

    Would you still have to write code to Read/write The Mcp2515

    or is that taken care off in the sopc component.

    The serial control lines so/si and Sck/cs

    Thanks

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    The component will do the job, You'll only have to tell the component what to do (read or write), select chipselect and assign data buffers to place data.

  • Altera_Forum's avatar
    Altera_Forum
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    Hi Socrates,

    If you were using verilog could you give me an example of a read to

    the Mcp 2515, the format reqd.

    Many Thanks

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    You don't need HDL at all. The component has everything required, use Nios and code in C.

  • Altera_Forum's avatar
    Altera_Forum
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    Hi Socrates,

    Sorry to bother you again.

    We had a problem, are interface between the spi core and the mcp2525

    was driven\writen in C.

    But it was though that the interface could be hard coded , and relive

    the burdon from the system c routines.

    (Less interupts for the c code)

    I was asked to look into the possibility of hard coding the interface.

    Thanks

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    The SPI component documentation mentions that is is possible to combine it with a DMA component to automate long transfers.

    If that doesn't suit your needs, you have two options:

    - Write a custom SOPC master to control the SPI SOPC component, replacing the logic you have in C.

    - Write a full-custom SOPC SPI component.
  • Altera_Forum's avatar
    Altera_Forum
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    Hi Rubalho,

    - Write a custom SOPC master to control the SPI SOPC component, replacing the logic you have in C.

    is there a simple way of doin the above,say in verilog.

    Thanks

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    One thought is to write a small verilog or vhdl module that will drive the SPI lines, and be controlled by a FSM. The data from the Microchip CAN chip would then be placed into data into a small RAM, that would effectively be dual port. Off chip access by an external uC could be done this way, or simply write the logic to interface to SOPC/Qsys.

    Fundamentally, if you want to removed the interrupt burden on the processor, doing the design in HDL always seems to be best. -James