AFDNew Contributor4 years agoCyclone 10GX .ctl files for Mentor HyperLynx DDR Wizard Timing File Can we please have the *.ctl files for C10 GX with timing parameters, similar to the Mentor example that has the timing parameters loaded in the HyperLynx DDRx Wizard .v file for Arria 10.
Recent DiscussionsDK-DEV-AGI027-RA QSPI Verification FailsCyclone 5 SoC FPGA Bank Supply PrerequisiteAGILEX 5 Migration issueTo INTEL - Request for Compliance Data from Analog Devices, IncArria 10 GX RX max intra-differential pair skew