Forum Discussion
New ContributorCreating IO PLL component using command line mode
Hi Sunil,
For reminder next time, please help to login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. So that we can support this case further for your ease.
Regarding the two commands:
To execute a TCL script that instantiates the IP and sets desired parameters: ➢ qsys-script –script=.tcl
This will require a .tcl script to instantiates the IP and sets desired parameters without the use of the GUI to select or set the parameters from the IP catalogue.
To generate the IP core variation: ➢ qsys-generate .qsys
This will generate a .qsys file, and is the same as if you use the "Generate HDL" in the Platform Designer.
New ContributorHello Farabi,
Thanks for responding. I was mentioning about the atera_iopll (IOPLL Intel FPGA IP) component. To use this component in a design, we generally use quartus tool in GUI mode to configure and generate it. Instead of using GUI mode, is it possible to generate this component using tcl script?
Regards,
Sunil
New ContributorHello Farabi,
Pl. check the attached snapshots.
After creating the IOPLL component using Qsys tool in GUI, I used 'Export system' to generate the tcl files.
Could you pl. let me know how to use this tcl file?
I tried using "qsys-script --script=intel_iopll.tcl" in command line.
Is this the right way to do?
Thanks,
sunil
