Forum Discussion
Altera_Forum
Honored Contributor
12 years agoTwo things:
a-The error now is in the line: int_address => A_address; the assigment operator is <=. The corrected line is: int_address <= A_address; b-There will be an error again. The moduler counter_unit generate on its outputs the int_address vector. But you also receive this vector from outside of the top level entity ( A_address is an input to the circuit ). So you have a contention on signal int_address. May be you should use a multiplexor. In a special condition of the circuit you use the counter output, in other condition you use A_address. But this depends of how your circuit should behave.