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i use modelsim for rtl and complie all files in the project

in rtl simulation i understand normal simulation with model sim

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ps. I install modelsim altera and i read in the document the method for stating gate level simulation:

Compiling Testbench and Design Files into the Work Library
The following instructions show you how to compile your testbench and design files
into the work library using the ModelSim-Altera GUI.
1. Browse to locate your designs.
2. Click OK.
To create the work library, perform the following steps:
1. In the ModelSim-Altera software, on the File menu, point to New and click
Library. The Create a New Library dialog box appears.

but is there some easier way for this kind of simulation - something like standart modelsim simulation with forcing of signals ?