Altera_Forum
Honored Contributor
14 years agoCounter Issue
Hello all, I'm new to this Altera world. Nice to have this forum that we can share something. I would like to make a pluse generate after every 8 clock signal. But the result is different, later pluse is always less than expect.
Here is the code: always@ (posedge sclk or posedge cs) begin if(cs) begin counter<=0; flag<=0; end else if(counter<8) begin counter <= counter +1; flag<=0; end else// begin counter <=0; flag<=1; end// end It's funnny that if I remove the part within //..//, and use flip flop instead of pluse, the result seems correct. Could anybody help on this? Thanks.