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Altera_Forum
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14 years ago

Counter Issue

Hello all, I'm new to this Altera world. Nice to have this forum that we can share something. I would like to make a pluse generate after every 8 clock signal. But the result is different, later plus...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

What's the size of reg counter? If it's 3 bit, the else section will be never reached. If it's 4 bit or more, the counter will divide by 9 rather than 8.