Altera_ForumHonored Contributor18 years agoCount enable vs Clock enable This may be a stupid question :confused: but I'm having a hard time with it. every time I think I get it I get confused again. can someone please explaing this? what happens with lets say a simple co...Show More
Altera_ForumHonored Contributor9 years agohttps://www.dropbox.com/s/8z2rgxvisni71y6/syncdesign2.pdf?dl=0
Recent DiscussionsImplementation of lower data rate.eFUSE : Agilex F series and AGilex I series PCIe cardIP components used in the design have conflicting settings. Intel PCIE Ftile MCDMAEP4CGX22CF19C8N Failure Short D8 to C8Cold Temperature Issue