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Altera_Forum's avatar
Altera_Forum
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11 years ago

Constrain combinational delay in Timequest

Hi, I am trying to design an asynchronous system using FPGAs (I know it is not advisable). I need to be able to constrain the combinational delay between a pair of nodes/keepers. Does Quartus p...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

The command you want would be

set_max_delay [node1] [ node2] [delay]