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Altera_Forum's avatar
Altera_Forum
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15 years ago

compare multiple std_logic_vectors

Hi,

I have several FIFO's and i need to read out, the one with the most data first. I use the byte counter of the fifo to compare.

But what is the best way to compare those vectors?

if A > B and A > C and A > D then

input <= A

elsif B > A ......

You get the point*

Or is there a better way ?

For now i'm using above code but it is getting complex with allot of fifo's.

11 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

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    I would never recommend recursion in VHDL to a beginner. A recent example (http://alteraforum.com/forum/showthread.php?t=27911&highlight=recursion) showed someone trying to use recursion like they were writing software, and they caused a stack overflow in Quartus during synthesis.

    I agree it can be used when you know what's coming, but uncontrolled and misunderstood uses of it can lead to problems.

    --- Quote End ---

    You should give beginners some credit too, shouldn't you?

    I agree there are some pitfalls, but it is often very useful and elegant. Plus having a function makes it very little work adding (or deleting) inputs, (re-)writing the binary tree by hand can be tedious if you add or delete a member.

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    ..., then a binary tree would be the most effective way to achieve it

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    That is exactly what the recursive function achieves.

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    A reasonable viewpoint. The suggested recursion is actually ending up in a binary tree. For a limited number of inputs (e.g. <= 8) the code text will be shorter when writing it enrolled. For a higer number of inputs, you possibly want a pipelined action, which unfortunately can't be provided by the recursive construct.

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    Yes for a small number of inputs initially it may quicker to write the code flat-out (unrolled), but if you later have to add an input or two you end up retyping the lot.

    A for-loop will be easier to write but ends up in a stair-case logic, which is a lot slower.

    The idea in VHDL should be to look for re-usability. Together with generics, functions help a lot.

    You are quite right that a recursive function cannot be pipelined (which is a real pity).