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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

comparator

i need to do

Greater or equal than

Less or Equal than

not equal

but it is not working with me

could you check this code i have done greater or equal than but it is not workin but aeqb,agtb,altb are working correctly

library ieee;
USE ieee.std_logic_1164.ALL;
entity compare8 is
port(
	a,b :	IN INTEGER RANGE 0 to 255;
	agtb,aeqb,altb,ageqb :	OUT STD_LOGIC
);
end compare8;
architecture a of compare8 is
SIGNAL compare : STD_LOGIC_VECTOR (3 downto 0);
BEGIN
process(a,b)
BEGIN
if a > b THEN
	compare <= "1110";
ELSIF a < b THEN
	compare <= "1101";
ELSIF a = b THEN
	compare <= "1011";
ELSIF ( a >= b ) THEN
	compare <= "0111";
ELSE
	compare <= "1111";
END IF;
END PROCESS;
agtb <= compare(0);
altb <= compare(1);
aeqb <= compare(2);
ageqb <= compare(3);
end a;

13 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    This is rather basic knowledge, but I'll humour you.

    You might invest in a few good books on VHDL, I suggest you get a copy of:

    Circuit Design with VHDL

    by Volnei A. Pedroni

    ISBN 978-0-262-16224-1

    process( Clk ) 
     begin
     if rising_edge( Clk ) then
    IF a > b THEN
    	compare <= "010110";
    ELSIF a < b THEN
    	compare <= "001101";
    ELSIF a = b THEN
    	compare <= "100011";
    ELSE
    	compare <= "111111";
    END IF;
    end if ;
    END PROCESS;