Altera_ForumHonored Contributor15 years agocode style for mixed width port dpram hi,everybody.How to modify this code to generate a mixed width port dpram, the simplest example such as : emodule true_dpram_sclk ( input [7:0] addr_a, input [0:0] data_a, input...Show More
Altera_ForumHonored Contributor15 years agoin this case it should be submitted to Altera as a synthesis enhancement.
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