Circular Buffer Implementation

I have some questions for you. Where is your external SRAM that you were talking about? sram_buffer in your code are going to be implemented as registers or internal ram depending on how you access it. Do you want a 256 byte memory? You just have a 20 byte memory (20x8 bits) in sram_buffer. Also doing three writes and additions within the same clock cycle (second always) is a bit much for a regular ram. One of the hardest things to do coming from a software background going to HDL/FPGA is to be able to envision what hardware your code turns into.