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Honored Contributor
Honored Contributorchange the clock frequency of the FPGA board
I want to change the clock frequency of FPGA DE0 board from 50MHZ to 8MHZ, As my IP core generally worked at 8MHZ. How can I realize this? Use PLL? If I use PLL, the input is the 50MHZ, how can I con...
Altera_ForumHonored Contributor
Honored ContributorYes, if you use a PLL the FPGA will draw a bit more power.
If you don't want to use the PLL, you have two options. Option one, use a ripple clock divider. Which will also draw a bit more power, but problably not as much as a PLL. Though, these can make timming closure harder. Option two, use an external 8 MHz clock source and feed it to the DE0 board. I don't see an external clock input in it but you might be able to use one of the generic inputs.
