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Altera_Forum
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15 years ago

Can I use a normal pin as DDR2 controller's DQ?

I make a mistake when I do the schmatics work, so I must use a normal pin as DDR2 controller's DQ. When I complie the project, I face the error: altmemphy pin placement unsuccessful.The assigned l...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

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Stratix family? If you look through the handbook, the hardware has specially structures on the DQS ports that are used by the PHY. If it used "generic" FPGA structures, it would never meet timing.

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Not quite, in Cyclone II, III or IV timing is met using the "generic" fabric. Maximum speed is of course lower than for Stratix with the DDR registers built in to the IO-ring.