Forum Discussion
Altera_Forum
Honored Contributor
13 years agoThe FPGA should always answer on the JTAG pins, even if it failed during the configuration phase. Do you have pull-ups on nSTATUS, CONF_DONE and nCONFIG?
Do you have power to all the I/O banks, and all the PLL supplies? Can you check the soldering of the FPGA balls?