Burst Reads with NIOS II

Question

I am trying to use the NIOS processor to read some debug data that has been dumped on a Memory Mapped device on the Avalon bus, using burst reads. However, I am stuck in writing the C code. I am not able to find the routine that allows me to specify the burst count value etc. I have seen only the IORD routines, which appear to be for a single 32 bit read only.

How can one perform burst reads over the avalon bus for large amounts of data transfer and what are the C funtions to be used?

altera_forum · Answer

Hi, you should use DMA. Tons of examples out there.  Apus

altera_forum · Answer

Yeah, I found some reference designs using DMA. Just curious to know if the NIOS directly could issue burst reads. Thanks for your reply Appus.

altera_forum · Answer

The caches in the Nios CPU can issue burst reads. When you perform a regular read operation (i.e. through a pointer and not an IORD macro) and if you have a data cache, the cache will read a full cache line. If you enabled bursts access for the cache, it will do so with a burst read.

altera_forum · Answer

Daixiwen, can you give an example code snippet of how exactly i can issue reads to cache memory? Is there anything i need to do while configuring the NIOS core so as to enable cache? Right now I have used only the basic settings.

altera_forum · Answer

Yes, in SOPC builder, open the settings of the Nios core, go in the cache/memory access tab ( I don't remember the exact name) and enable the cache and the burst access.

To read memory, just use standard C code. Create a pointer, make it point to the memory you want to read and do the read operation.

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Burst Reads with NIOS II

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