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Honored Contributor
Honored ContributorBurst Reads with NIOS II
I am trying to use the NIOS processor to read some debug data that has been dumped on a Memory Mapped device on the Avalon bus, using burst reads. However, I am stuck in writing the C code. I am not ...
Altera_ForumHonored Contributor
Honored ContributorThe read/write bursts from the instruction and data caches are independent of your code. The caches are present to perform more efficient accesses to the memory so it's not something you can control much in your own application. You can control whether or not to access cache-able memory but if you bypass the cache then the Nios II core *will not* perform burst transaction to/from the memory.
