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Mathias3's avatar
Mathias3
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2 years ago

Broken JTAG-chain Cyclon V SoC

Hello Issue: In our design with a Cyclone V SoC 5CSXFC6D6F31I7N we have the JTAG-chain: HPS->FPGA. With the Quartus Prime Programmer Standard Edition und USB-Blaster (terasIC) we see a JTAG-response...
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mabdrahi's avatar
mabdrahi
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2 years ago

Hi Mathias,


Can you change the new JTAG cable?

I think we have this issue before that cause by cable it self.


Thank you,

Aliff


  • thom62's avatar
    thom62
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    2 years ago

    Aliff

    Today we receive a new USB Blaster, the latest version from Intel, I'll make tests with it. Yesterday I made tests with the old one from terrasic and got the following result:

    Then I made tests with a Segger J-Link J-TAG interface and its corresponding J-Link Commander app. This test has been performed with a 4MHz TCK clock and I got the same result on TDO: 0xFFFFFFFFFFFFFD55 while scanning the instruction register.

    SUMMARY: two custom boards in our lab show the same behavior, two complete different tools also show the same results, TCK frequency has no influence to the measured results.

    I think the HPS J-Link is not working in our setup.

    best regards

    Thom

  • thom62's avatar
    thom62
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    2 years ago

    Hi Aliff

    we can close this support request! +1.1V for the HPS system was not working as expected. For this reason the J-TAG chain was not working properly in the HPS part. From the beginning I was pretty much sure that this might be the reason but I couldn't find the source..

    Thank you very much for your time and help..

    Best regards

    Thom