Forum Discussion
Altera_Forum
Honored Contributor
17 years agoI suggest you to create a top-level bdf file in which you create a schematic with connections between block symbols.
Every vhdl file that you have created can be transformed into a block symbol by opening the vhdl file and using the menu File --> Create/Update --> Create symbol files for current file In the top level bdf file you can insert each block symbol that you have created in this way. The connections between the blocks can be created using wires and busses. In this way you can connect your altsyncram block to the surrounding blocks by simple wires, without having to modify its automatically generated code. I hope this helps.