BPSK Demodulation

How did you design the costas loop? How do you control the loop>

loop filter has to be separate filter from rrc. You will use it to control the lock of your costas loop and usually a simple IIR will do

I have used rrc after costas locking section but I know some do it before but not as loop filter (there are different rx configurations and you better model it matlab before going to hardware).

I am sorry, it's my mistake... I didn't mention that after multiplication there is CIC filter... before RRC.

So these are the waveforms:

https://www.alteraforum.com/forum/attachment.php?attachmentid=10365

Basically, I am trying to design this loop:

https://www.alteraforum.com/forum/attachment.php?attachmentid=10366

Instead of LPF, I used CIC filters, as they do filtering and decimation at the same time. Am I wrong?

You are right, RRC has nothing to do with Costas Loop.

You need one filter per branch to remove the f1+f2 (sum term) leaving signal at dc (f1-f2). Any LPF will do (including rrc if you wish).

The loop itself needs error detector and filter to smooth out the error. This loop filter can be an IIR with variable gain.

The IIR filter represents the integral part of your loop control system.

You may need further control terms such as proportional term.

The filter error is then used to shift phase(or frequency) of NCO in the opposite sense.

It takes sometime for the loop to lock. You observe the error and this should converge and settle with low jitter.

I notice your bb_signal_I has plenty of zeros in it but not Q

I wouldn't advice you to do any decimation inside loop as it could get complicated on you.

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You need one filter per branch to remove the f1+f2 (sum term) leaving signal at dc (f1-f2). Any LPF will do (including rrc if you wish).

The loop itself needs error detector and filter to smooth out the error. This loop filter can be an IIR with variable gain.

The IIR filter represents the integral part of your loop control system.

You may need further control terms such as proportional term.

The filter error is then used to shift phase(or frequency) of NCO in the opposite sense.

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The error detector you referred to is the mixer at the end of the loop, right?

Regarding loop filter, I saw some structures that combine both integral and proportional terms,

is it the same as you are suggesting?

http://www.alteraforum.com/forum/attachment.php?attachmentid=10367&stc=1

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I notice your bb_signal_I has plenty of zeros in it but not Q

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You mean zero crossings? is this bad?

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I wouldn't advice you to do any decimation inside loop as it could get complicated on you.

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I thought decimating is beneficial before doing any further signal processing as this relaxes the requirements.

I'll use regular LPFs then. How to choose the cutoff frequency of these LPFs?

The bb_I difference from bb_Q may be due to your nco phase. For now assume it is ok and focus on cutting off the f1+f2 term in each branch.

The wanted signal will move close to dc and depending on your signal bandwidth. you need to cutoff clear of your signal bandwidth but kill the f1+f2 copy.

So far you have downconverted your signal to dc but now and since signal centre may shift either side of dc due to uncertainties of oscilillators bewteen Tx and Rx you need to force it to dc all the time. The error detector is just a multiplier as you have found out. apply IIR LPF (integrator) to the error as it will be very noisy. The gain of IIR need to be manually adjusted until error shows dampened oscillations heading towards zero with some jitter.

For testing you will need to move your RF centre either side and see that the loop does not lose lock otherwise the radio user will have to keep adjusting the tuning knob and lose interest in music.

If your loop fails to lock try adding the proportional term to the output of IIR through a scaler that can be adjusted.

Hi, KAZ.

I modeled it in MATLAB.

After converting to DC, I am filtering using a FIR filter that utilizes Hamming window. The output of the filters are not clear of f1+f2 though! High component frequency is just attenuated, is this the purpose or I need to completely eliminate it? If I need so, filter required is of order 200+!! I think that's very much resource consuming when it's ported to FPGA, right?

Regarding IIR filter, how do I design it? Do I use fdatool in MATLAB? or the structure I attached above is good?

for IIR you may try the leaky integrator:

y(n) = alpha.x(n) + (1-alpha).y(n-1) (requires two mults) or its equivalent of one mult:

y(n) = alpha.[x(n) - y(n-1)] + y(n-1)

alpha will give you you control of cutoff but dc gain will stay unity (alpha = 0~1 normalised)

you can also use power of 2 value for alpha to avoid that single mult if such cutoff resolution is enough.

if required you can also increase/decrease dc gain (apart from cutoff) by scaling input as per your diagram or dividing final output by truncation.

For f1+f2 frequency filtering you need to attenuate it enough e.g. by 40dB. 200 taps x 2 sounds way too much. You don't need to cutoff that sharp since the sum term will be at some distance and assuming you don't have much noise in your signal or that it can be filtered by rrc. I personally believe you better use rrc inside the loop for this purpose.

That's great!

But, would you please explain what "200 taps x 2" mean?

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That's great!

But, would you please explain what "200 taps x 2" mean?

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two filters each 200 taps

I did the LPFs that attenuate the f1+f2 components, and it filters perfectly (Using 200 taps x 2).

Now, I am confused with the loop filter (IIR filter). Many texts suggest using the proportional-integral control technique that I attached before.

I believe you are referring to the same thing except that yours has no proportional part (and you suggest to add it later if needed).

It has this transfer function: H(z) = c1 + c2/(1 - z^-1)

where c1 = 4*(theta)^2/(1+sqrt(2)*theta+theta^2)

and c2 = 2*sqrt(2)*theta/(1+sqrt(2)*theta+theta^2)

where theta = 2*pi*BW, BW is bandwidth of the filter in Hz.

Let me ask you some questions:

1- How to determine the cutoff frequency of this filter, regardless of the structure.

2- Is leaky integrator the same as PI technique? How different they are?

I think I have more questions but they relate to your answers of these.