Boucing/Ringing seeing on Output pin of Cyclone II FPGA

As a general remark, the ringing isn't specific to FPGA, it occurs with any fast digital logic. The advantage with FPGA is that you have means to control it in part as the said drive strength setting. Setting all FPGA outputs to minimum drive strength isn't a bad idea.

But you didn't tell about your measurement setup. It could be, that the ringing is present at your oscilloscope probe only, but not at the circuit. If you observe the ringing directly at the output pin, this may be the case.

When you measure the signal at a distant load, the overshoot is likely to exist actually in the circuit. If minimum drive strength can't remove it, an additional series termination at the FPGA output may help.

I assume that you have a low impedance common ground, typically a ground plane. If not, overshoot problems can be severe.