Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Bitstream (.SOF) details

Hi,

I would like to know if there are any sheets on Configuration/Bitstream Details for Altera FPGA,

explaining the operation codes in the bitstream header, and the general bitstream layout.

thanks,

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Sorry, this information is top secret. You cannot extract information from *.sof files. Why are you asking? Want develop better tools than Altera? Or revive an old project with lost source files?

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    I'm working on Partial Reconfiguration with V-series Altera FPGA.

    I thought that there were some "Configuration Details User guide" like

    Xilinx's one. That's all !

    Thank you linas for this information,

    :)
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    I think, you could find the same information in the handbooks of V-series devices. There is a chapter for configuration for sure. Or I missed something and Xilinx published their recipe for brewing bitstreams? :)

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    yes, I've already looked in FPGA Handbooks. May be I missed some important one...

    Otherwise, Xilinx does explain every and each ops codes and data of *.bit files (bitstream).