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Altera_Forum's avatar
Altera_Forum
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13 years ago

Bit Stream wont load

Hi

I have a board that has two EP3C16's and a EPCS16 to hold the bit stream. I am trying to program using the AS mode with the USB Byte blaster. I have set the first device as Master active (MSEL 010) and the second device as passive serial (Msel 000). I have been able to program the EPCS by generating .pof file from the two FPGA's .sof files and it looks be be OK as it verifies in Quartus with no error. The problem is that the FPGA's are not getting the data. It is constantly asking for data as the clock is active. I can see that data is being sent from the EPCS. I have all of the signals on a logic analyzer and I can see the the conf_done signal never goes high

Has anyone got any ideas as to why the FPGA's wont program?

Thanks

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    can you post scope shots of nCONFIG, nSTATUS, and CONF_DONE?

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    --- Quote Start ---

    can you post scope shots of nCONFIG, nSTATUS, and CONF_DONE?

    --- Quote End ---

    Thanks for the reply.

    I figured out what my problem was. When I converted the two .sof files. I added them as Page_0 and Page_1 when they both should have been under Page_0.