Binary Divider

If you are just wanting to try out the Altera tool, then you can just instantiate the lpm_divide module in your test HDL and run it through Quartus II's synthesis and place&route. Or, you can write your own HDL code to implement a binary divider if you want (but for the purpose of taking Quartus for a test drive, I think it doesn't matter).

Quartus->File menu has a New Project wizard that takes you through the steps of creating a new Quartus project (just define where your HDL is, what FPGA are you targeting, etc)

There is a button on Quartus that looks like the "play" button on a DVD player; clicking on that runs the design through all the necessary tools, pretty simple.