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Altera_Forum's avatar
Altera_Forum
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15 years ago

BeMicro UART Interface no data on RxD

Hi @ all I tried the following vhdl process code in order to receive data from pc com interface: com: process (clk) variable temp : std_logic_vector(47 downto 0) := "0000000000000000000...
Altera_Forum's avatar
Altera_Forum
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15 years ago

perhaps VHDL-2008 and its process(all) addition will help this misconception. then in teaching advanced simulation you could introduce adding/removing signals from the process statement