Forum Discussion
Can you show your parameter settings for the core? The TSD is on the first ADC in dual ADC devices.
You might also want to check this training that goes into the options for configuring the ADC:
https://www.intel.com/content/www/us/en/programmable/support/training/course/omaxadc102.html
Thank you for dealing with my problem!
I have only now realized that my FPGA from Arrow has the following identifier "10M08DAF484C8G" and the example I am using is for the "10M08DAF484I7N". The FPGA "10M08DAF484I7N" has two ADCs but mine "10M08DAF484C8G" has only one. This should not be the error, but here are the settings for the core on the two screenshots. I hope the example is valid anyway, otherwise maybe that would be the error already?
I created a repository for the code maybe it helps. If there are any problems in this regard, let me know.
https://github.com/GurkenIvanse/bemicromax10ADC
I will take the class.