Forum Discussion
Altera_Forum
Honored Contributor
13 years agoTypically reads don't care about having data valid at a very specific moment (only that addresses are stable long enough) so doing a continuous display of data during the read cycle whether the address has settled or not should be fine. If you're doing an operation like a FIFO where the read triggers an increment, there should be a single synchronous edge-triggered event to indicate the completion of the cycle.
For writes, the timing is much more critical to be communicated and typically an edge - a write enable or an ALE, for instance - is used to transfer data. So reads can be asynchronous (or the output from a synchronous block updating from a higher speed clock) but writes and FIFO address updates should have synchronous edges to qualify the events. With your asynchronous blck, how do you guarantee that one and only one address is written?