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It's a representing a /6 rather than a /3 frequency divider.
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FvM, you are right.
I wrote the code by heart and I forgot that I must clock registers on both pos and neg clock edges.
Here is the 'real' working code; this time I also tested it with ModelSim
module divider3
(
reset,
clkin,
clkout
);
input reset;
input clkin;
output clkout;
reg r1, r2, clkout;
always @ (posedge clkin or negedge clkin)
begin
if (reset)
begin
r1 <= 1'b0;
r2 <= 1'b0;
clkout <= 1'b0;
end
else if (r1 & r2)
begin
r1 <= 1'b0;
r2 <= 1'b0;
clkout <= ~clkout;
end
else
begin
r1 <= 1'b1;
r2 <= r1;
end
end
endmodule
To Bat:
I think the code is working and the mark to space is good, both in the initial /6 version and in the correct /3. Why not?
If I remember correctly I already used this type circuit many years ago and it worked perfectly, with 50/50 duty cycle and no glitches.
Regards
Cris
Honored Contributor
