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Altera_Forum
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10 years ago

arriaII GX DDR3 assignment

DDR3（SSTL15）(MT41J64M16 – 8 Meg x 16 x 8 banks) is assigned to bank7A of ArriaIIGX (EP2AGX125) in altera evaluation board.

I'm planning to assign same DDR3 as this to bank3A（Bottom side）.

I judge that it's better to add DDR3 to the BANK3A because RUP0,RDN0 exists in BANK3A, and this is related to OCT.

A power supply relation is established as follows.

This is also indicated on attachment.

RUP0=1.5V、VREFB3AN0=0.75V、VCCIO3A=1.5V、VCCPD3A=2.5V

DDR3 clocks (DDR3_CLK_P (N)) are assigned to a differential output pin (DIFFIO_TX_B13p (n)).

DQS0 groups(DQ0-7) are assigned to BIO2.

DQS1 groups(DQ0-7) are assigned to BIO1.

address,commands are assigned to BANK3A.

I use DDR3 memory MT41J64M16 ? 8 Meg x 16 x 8 banks for example.

Compilation is successful just in case.

Is my setting right?

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    If it compiles without any issues, it should be fine. You can also consult the pin out files on Altera's website just in case.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Just FYI, it is not necessary to have the DDR3 in Bank3A because the ArriaII supported OCT on all I/O pins. You can calibrate the I/O banks with any of the OCT cal blocks available in the device provided the VCCIO of the I/O bank with the pins using cal OCT matches the VCCIO of the I/O bank with the cal block and its associated RUP and RDN pins

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    --- Quote Start ---

    Just FYI, it is not necessary to have the DDR3 in Bank3A because the ArriaII supported OCT on all I/O pins. You can calibrate the I/O banks with any of the OCT cal blocks available in the device provided the VCCIO of the I/O bank with the pins using cal OCT matches the VCCIO of the I/O bank with the cal block and its associated RUP and RDN pins

    --- Quote End ---

    irish-san

    Thank you.

    I changed device to 780 pin device from 1152 pin device(Because of cost).

    And I cannot assign ddr3 in bank3.(Lack of a pin)

    So I assign ddr3 to bank4 and 7(I use 2 ddr3 devices).

    Bank7 has RUP/RDN pin.Bank4 has no RUP/RDN pin.

    RUP(BANK7) is connect to 1.5V.VCCIO of BANK4 and 7 is 1.5V(VCCPD=2.5V).

    It is same VCCIO voltage,so I can calibrate BANK 4 and 7 with the cal block(BANK7) associated RUP and RDN of BANK7.

    Is it right?