Forum Discussion
Luca_Liu
New Contributor
6 months agoArria10 FPGA LVDS input assignment
Hi, I want to assign a lvds input pin in the Arria10 FPGA without LVDS RX IP, the bank VCCIO is 1.8V. I have used the quartus Assignment Editor to do the configuration as follows. Both PIN_A32 an...
FakhrulA_altera
Regular Contributor
6 months agoI’m glad your question has been addressed. I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get support from Altera experts. Otherwise, community users can continue to help you in this thread. Thank you.
FakhrulA_altera
Regular Contributor
6 months agoI’m glad your question has been addressed. I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get support from Altera experts. Otherwise, community users can continue to help you in this thread. Thank you.