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Altera_Forum
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16 years ago

Arria II GX + DIMM = no more than 12 HSTL/SSTL output or bi-directional pins are allo

I'm trying to get my EP2AGX45 (572 package) Arria II GX to interface with a DIMM. I've run into an apparent limitation of 12 SSTL signals per I/O bank. It seems i will have to move up to the top devi...
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Altera_Forum
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15 years ago

I didn't try with differential DQS. To see, what's the problem with 572-pin Arria II, I would have to implement a test design. I was originally referring to the reported "12 SSTL signal limitation" which is known as a problem of missing OE-group assignments. It may be the case, that Arria II has additional restrictions, that don't allow to implement a 64-Bit RAM interface with 572-pin package. If so, it would be a chip design or Quartus flaw.

I implemented however a DIMM interface with only two 1.8V banks of 1120-pin Arria, which should give an almost comparable number of available memory pins.