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As far as I see, a 64-Bit DIMM can be operated from 3 IO banks in the 572 and 780-pin package. The limiting factor is the number of availiable DQS groups. The said "limitation of 12 SSTL signals per I/O bank" is caused by incomplete pin assignments.
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I was not able to fit the DIMM interface in the 572-pin Arria II package, even when using four I/O banks. The 572-pin EP2AGX45 has 4 DQ groups on the top side and 4 DQ groups on the bottom side so the number of DQ groups should not be the limitation.
All I/Os were configured correctly via the QII-generated TCL scripts. When moving up to the 780pin package the design would fit in the same four I/O banks. I think the number of available SSTL-capable pins in each I/O bank is limited due to the physical 572-pin package. I'm sticking with the 780-pin package unless someone can prove that a DIMM somehow can be hooked up to the 572-package (I have not found a single example of this anywhere). In my case the price difference is about $100 so not too critical for my end product.
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