FvM
Super Contributor
Super ContributorArria 10 IOPLL Dynamic Phase Shift using M-Counter
Hello,
we use to perform clock fine tuning with Cyclone designs by applying continuous phase shift to M counter (PLL feedback clock divider). This way the frequency of all PLL output clocks is tuned by a proportional factor, similar to using a VCXO reference oscillator.
According to Arria 10 IOPLL documentation AN728, dynamic phase shift isn't provided for M-counter, so we would need cascaded PLLs to implement the intended tuning of multiple PLL outputs.
While testing an Arria 10 cascaded PLL design, I found that undocument value cntsel = 5'b01011 performs M-counter phase shift as available for Cyclone III, IV, 10 LP and MAX 10.
Are there any reasons why the feature isn't documented?
Best regards
Frank
