Forum Discussion

Nikitha_Sree's avatar
Nikitha_Sree
Icon for New Contributor rankNew Contributor
2 years ago

Arria 10 Gx FPGA Development Board

Hi , I'm presently working on the development kit for the Arria 10 Gx FPGA Development Board. We can execute the BTS test files included with the kit using Quartus Prime PRO 24.1 software, but when ...
Board Debug
Configuration
Programmable Logic Device
aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi Nikitha_Sree,


You can try the Nios V hello world example first:

https://www.intel.com/content/www/us/en/design-example/788688/arria-10-fpga-hello-world-on-the-nios-v-g-processor-design-example.html

This is a simple application to showcase a simple application(print hello world) running in the soft processor(NiosV).

From this example, you can get to see the printf application showing the hello world logs through your Jtag connection.

Before getting the application to run, you will compile the design in quartus then flash the design into the FPGA fabric through the same Jtag connection.


For more details on Nios V tutorial related as reference:

https://www.intel.com/content/www/us/en/docs/programmable/784468/current/an-985-processor-tutorial.html


As for the migration to your custom project for reference:

https://www.intel.com/content/www/us/en/docs/programmable/773196/current/overview.html


Thanks.

Regards,

Aik Eu


  • Nikitha_Sree's avatar
    Nikitha_Sree
    Icon for New Contributor rankNew Contributor
    2 years ago

    Hey Aikeu,

    Thanks for the inputs provided that helped a lot in starting the custom design.

    I couldn't use the Ready to test files (.sof files) on the evaluation board since the FPGA part number is different i.e Part number of the FPGA on evaluation board - 10AX115S2F45I1SG, I tried changing the FPGA part number directly in the Quartus and tried to compile but it didn't work like that.

    I have started designing the new code with the user guide provided, But I found an issue wrt the user guide

    1. Select VID mode of operation in Configuration and Power Management Assignments - this is greyed out in my design can you suggest for this

    Please find the attached screen shots for reference.

    • FvM's avatar
      FvM
      Icon for Super Contributor rankSuper Contributor
      2 years ago
      Hi,
      the .sof file is for Stratix 10, also power managment functions referenced in user guide are only available for Stratix 10 and can be ignored for Arria 10.