Forum Discussion
Ash_R_Intel
Regular Contributor
5 years agoHi,
This Application Note has guidelines on how to handle each of the pins.
AN 738: Intel Arria 10 Device Design Guidelines
Please refer this along with the Pin Connection Guidelines:
http://www.altera.com/literature/dp/arria-10/PCG-01017.pdf
Regards.
- jdun5 years ago
New Contributor
Thank You, I ended up moving many pins to LVDS banks, which can be tied to GND on power up. They also can be tied to VCCIO through a pull-up as long as you stay under 10mA. And the I/O I didn't move I use this part. It is a bidirectional level shifter with an OE. https://www.ti.com/product/TXS0108E I figure I better follow the specs.