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    • FPGAOLOG's avatar
      FPGAOLOG
      Icon for Occasional Contributor rankOccasional Contributor

      It looks like if I use m18x18plus36 mode, and chain in; DSP can add 36 bit to 64 bit. The question is if I can connect chain in port to ALM logic.

      Here is the instantiation that works in simulation.

      dsp_18x18Plus36pluschain u44 (
      .accumulate(1'h0), // accumulate.accumulate
      .aclr(3'h0), // aclr.aclr
      .ax(18'h0_0001), // ax.ax
      .ay(18'h0_0002), // ay.ay
      .bx(18'h0_2000), // bx.bx
      .by(18'h0_0600), // by.by
      .chainin(64'h0001_0002_0003_0040), // chainin.chainin
      .chainout(), // chainout.chainout
      .clk({3{mod_clk}}), // clk.clk
      .ena(1'h1), // ena.ena
      .loadconst(1'h0), // loadconst.loadconst
      .negate(1'h0), // negate.negate
      .resulta(), // resulta.resulta
      .sub(1'h0) // sub.sub
      );

  • SengKok_L_Intel's avatar
    SengKok_L_Intel
    Icon for Regular Contributor rankRegular Contributor

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