Array Multiplying CPU

The code is based on several misunderstandings of VHDL (or programmable logic in general) operation principles, I think. I'm unable to see the intended function exactly, but I can tell what constructs can't work for sure: Basically, the addr variable is incremented in concurrent code, not triggered by a clock. That means, it has no defined value at all. As a result, all expressions depending on addr are removed by the compiler, cause no value can be calculated for them.

If you wan't to perform calculations for an array, you have two options:

1. You can perform it sequentially, incrementing addr in a clock synchronous process.

2. You can perform it in parallel, using a FOR .. GENERATE or FOR.. LOOP construct. In this case, also the results must be assigned in parallel, e. g. to a result array.

Apart from this issue, the assignments within your clock synchronous process part probably won't have the intended result (here I'm only guessing what's actually intended). Each assignment implies a delay of one clock cycle. E. g. when north_int is present one cycle after north, sum_int has already a delay of two cycles, result_int three cycles and result four cycles.